Implementation of features detection and matching algorithms on FPGA using Nios II

The detection and matching of point features play an important role in most of the computer vision algorithms, such as; for 3-D reconstruction and robotics navigation, localization and mapping. Over the last years various detectors and descriptors have been proposed and successfully applied to the different applications. However, the developed detectors are based on computationally intensive algorithms, so it is desirable to implement them in hardware platform based on high performance reconfigurable systems. Nowadays, due to the flexible structure of Field Programmable Gate Array (FPGA) device, the latter can be involved in such complex algorithms of image processing. In this paper, some related works concerning implementation of features detection and matching algorithms on FPGA will be discussed in the state of the art, then we will illustrate a general framework for implementing two common features extraction detectors and two features matching algorithms on FPGA-Nios II system.