A unified GDB-based source-transaction level SW/HW co-debugging

This paper presents a unified interface to bridge the abstraction gap between software debugging and hardware debugging in System-on-Chip's (SoC's) where the former manipulates at the source/instruction-level while the latter at the cycle-level information. The unified interface consists of both circuit and software tool components. On the circuit side, a retargetable socket-based in circuit emulator (SBICE) is proposed to provide transaction-level run/monitor/modify control to any socket-compliant intellectual property (IP) core on the system interconnect. On the software tool side, GNU Debugger (GDB) and Open On-Chip Debugger (OpenOCD) are enhanced to provide integrated manipulation of SBICE and the on-chip CPU's ICE. Therefore, a system developer could monitor/debug interacting CPU and IP-cores in SoC in a consistent way within the enhanced GDB UI. A prototype of embedding the unified interface in a SoC with an ARM-like processor and IDCT core at RTL level is presented to demonstrate the usage and feasibility.