Development of stealth dicing tape for TSV process

TSV (Through silicon via) process has been attractive for smaller and thinner device development. TSV technology makes it possible that vertical communication by electrode between stacked chips. This communication makes devices smaller and thinner because of eliminating of conventional wire bonding. In addition, faster communication and electronic power saving are also advantages. But, Blade dicing of TSV wafer is too difficult because wafer is thinner. There is a possibility that chip crack and chipping may occur. So we select a Stealth dicing (SD) process. SD process can be expected that control of chip crack and chipping. Because there is not vibration such as blade dicing. This paper describes the performance of stealth dicing tape for manufacturing TSV chip.