A full-duplex transceiver front-end employing inverse class-D power amplifiers

A full-duplex transceiver front-end architecture that employs inverse class-D switching power amplifiers is described. An LC phase-shift network is employed between the receiver port and the antenna port. By proper phasing of the switching devices, the transmitted signal can add constructively at the antenna port while canceling at the receiver port, thereby enabling full-duplex operation. The motivation in using switch-based power stages is to reduce the degradation in receiver noise figure, that can result from the noise of devices in the transmitter. The use of a bandpass filtering network to reduce loss in efficiency arising from harmonics, and its impact on receiver noise figure and rejection are described, and the maximum efficiency of the transmitter is analyzed. Assuming inductors with a quality factor of 50, switches with series on-resistance of 5 Ω and noiseless receiver port matching, this architecture demonstrates 0.4 dB NF and 58% transmitter efficiency, with 28 dB rejection of the transmitted signal at the receiver port, in simulation. The 20-dB rejection bandwidth is approximately 20 MHz.