Consistent model of NBTI with low drain voltage in P-MOSFETs

A consistent model for the negative bias temperature instability (NBTI) is proposed to describe the influence of applied drain voltage. It is observed that threshold voltage shift induced by NBTI is obviously constrained by the applied drain voltage. With rise of drain voltage, the electrical field within the gate oxide (E
_ox
) decreases and results in the reduction of interface state generation and oxide hole-trapping. Therefore, the device degradation caused by NBTI will be weakened. The threshold voltage shift extracted from current characteristics is demonstrated as an integration effect of the trap distribution along the channel. The drain bias dependence of E
_ox
is obtained and implemented into the physical based NBTI model. The modeling result shows a good agreement with the measured data.