Hybrid integration of VCSEL's to CMOS integrated circuits

Three hybrid integration techniques for bonding vertical-cavity surface-emitting lasers (VCSELs) to CMOS integrated circuit chips have been developed and compared in order to determine the optimum method of fabricating VCSEL based smart pixels for optical interconnects and free-space optical processing. Each of the three bonding techniques used different ways of attaching the VCSEL to the integrated circuit and making electrical contacts to the n- and p-mirrors. All three techniques remove the substrate from the VCSEL wafer leaving an array of individual VCSELs bonded to individual pixels. The 4/spl times/4 and/or 8/spl times/8 arrays of bonded VCSELs produced electrical and optical characteristics typical of unbonded VCSELs. Threshold voltages down to 1.5 V and dynamic resistance as low as 30 /spl Omega/ were measured, indicating good electrical contact was obtained. Optical power as high as /spl sim/10 mW for a VCSEL with a 20-/spl mu/m aperture and 0.7 mW with a 6-/spl mu/m aperture were observed. The VCSELs were operated at 200 Mb/s (our equipment limit) with the rise and fall times of the optical output <1 nS.