Contents Security Solutions on Top of Caches
Both caches and DRAM chips are volatile RAM units, but caches are very distinct in the following aspects:
On chip. Caches are implemented as static RAM (SRAM) cells on the processor chip with the computing cores, while DRAM chips are separated out of the processor physically. This feature implies different security guarantees against physical attacks or mali-cious hardware manufacturers.
Data inconsistent. For the cacheable memory area, the data contents in caches won't always be consistent with those in DRAM chips after modification. Therefore, the caches compose an alternative storage for the memory data to be protected, especially against attacks on DRAM chips.
Controlled by cores. Although data can be transmitted from caches to DRAM chips or from DRAM chips to caches, transmission is controlled only by the CPU or GPU cores located on the processor chip. On the other hand, the data control interface of DRAM chips is exported. This enables cache-based solutions to prevent attacks from outside the processor.
Dedicated to each core. The DRAM chips and peripheral devices are usually accessible to all cores, but each core has its own L1 cache, in addition to shared L2 and L3 caches. This separated and dedicated L1 cache offers an option for isolated computing environments while malicious tasks are running concurrently on other cores.
