An efficient hardware/software co-design implementation for broadband telecommunication applications

During the development of a STM-1 add-drop multiplexer (ADM-1) we gained new experiences for efficient hardware/software co-design of such complex telecommunication systems. The chosen partitioning between hardware and software can be seen as typical for broadband telecommunication applications. The payload is processed in hardware while the management overhead is treated in software. To obtain an efficient hardware/software interface and to get optimal real-time task scheduling all software processes are interrupt driven. We developed a processor core with a stack architecture, which is optimized to handle that many interrupts. It yields a very area-efficient implementation. Besides many other benefits this hardware/software co-design solution uses approximately 52 KGE compared to the 81 kGE of a pure hardware implementation, and enhances its flexibility.