Iterative error correction with double/triple error detection

Wireless communication technologies have experienced an explosive development during the last two decades, based on the concept of cellular phones. More recently, short-distance wireless communication has also been discussed as a way to connect embedded electronic systems in industrial applications. Such systems have to work under stringent real-time constraints. For industrial in-door environments, we can a changing environment that produces serious flaws in wireless communication links occasionally. Therefore we explored new ways of forward error correction, which are fast in case of low error densities, but can deliver an enhanced multi-error detection capability if needed. A scheme of step-wise error correction using single error correction (SEC) step-by-step is feasible only, if double, triple and (with a high probability) multi-bit errors and errors on parity bits are detected and not mapped into false single bit error corrections. The paper give shows ways for expanding SEC schemes towards double and triple error detection, also including the vulnerability of extra parity bits.