Identifying the source of reduced performance in 1-stage-grown Cu(In, Ga)Se2 solar cells

Traps in Cu(In, Ga)Se
₂
(CIGS) deposited by listage and 3-stage co-evaporation processes were characterized using conventional deep level transient and optical spectroscopies (DLTS/DLOS) and scanning-DLTS to quantity and map the deep levels associated with the different growth approaches. Two defects were observed at E
_V
+ 0.44/0.50 eV and E
_V
+ 0.97 eV. The total deep level trap concentration was found to vary primarily due to the E
_V
+ 0.97 eV trap, which was ~4X larger in the 1-stage sample. This large increase correlates with the reduced open circuit voltage and conversion efficiency typically observed in 1-stage co-evaporation grown CIGS, suggesting that controlling the presence and concentration of this level may be important to enable high-efficiency CIGS solar cells using simpler processes.