LVDCI I/O standard based green parallel integrator design in green communications on FPGA

In this work, we are designing energy efficient integrator using LVDCI (Low Voltage Digitally Control Impedance) and LVDCI_DV2 (Half Impedance Version of LVDCI) I/O standard on 28nm Kintex-7 FPGA. For implementation we used Xilinx ISE 14.6 tool. By using LVDCI technology we accomplish energy efficiency with respect to low voltage impedance. In this whole work, we are using two different classes of LVDCI and LVDCI_DV2 in our entire task and analyzed that when integrator operates at 2THz device operating frequency with LVDCI_15 and LVDCI_DV2_15 I/O Standard, there is 32.25% and 31.57% reduction in IO power than LVDCI_25 and LVDCI_DV2_25 Standard respectively. Among both LVDCI_15 and LVDCI_DV2_15, the best case is LVDCI_15 which reduce 38.09% in IO power as compared to LVDCI_DV2_15. The Clock power, Leakage power and Signal power of integrator remains unchanged using LVDCI and LVDCI_DV2 I/O Standard.