The impact of induced gate noise when simultaneously power and conjugate noise-matching MOS transistors

A method for simultaneously power matching and conjugate noise matching a MOS transistor for radio frequency applications is presented in this paper. Experimental results from a 0.6 /spl mu/m nMOS transistor show that the magnitude of input reactance equals the optimum noise reactance (i.e., X/sub in/=X/sub opt/). Using this result, the author provides a method that can be used to match the optimum noise resistance to the source resistance. The described method uses the number of gate fingers as a parameter to conjugately match for noise.