Implementation and validation of a new thermal model for analysis, design, and characterization of multichip power electronics devices

This paper presents a new electrothermal model for the analysis, design and characterization of multichip power electronics devices. This model allows the junction temperature calculation for devices in which several chips are thermally interacting. At the beginning of the paper, the thermal and electrical parameters and submodels used for the simulation are described. Thus, the calculation procedure that allows one to determine the chip's temperature is illustrated. In the latter part of the paper, some results related to a practical application for which the model has been used and the experimental validation of the model are presented.