Evaluation of error-control strategies for the linear symbolic analysis of analog integrated circuits

The generation of approximate linear symbolic expressions for analog integrated circuits requires the use of an appropriate error-control strategy. The error-control strategy determines both correctness and compactness of the approximate expression. This paper presents an evaluation of different error-control strategies that fit within the flat symbolic analysis, using simplification during generation techniques for large analog integrated circuits. The theoretical exposition is illustrated with experimental results that allow a comparison of the proposed methods.