Abstract:
Relative Timing is introduced as an informal method for aggressive asynchronous design. It is demonstrated on three example circuits (C-Element, FIFO, and RAPPID Tag Unit...Show MoreMetadata
Abstract:
Relative Timing is introduced as an informal method for aggressive asynchronous design. It is demonstrated on three example circuits (C-Element, FIFO, and RAPPID Tag Unit), facilitating transformations from speed-independent circuits to burst-mode, relative timed, and pulse-mode circuits. Relative timing enables improved performance, area, power and testability in all three cases.
Published in: Proceedings. Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems
Date of Conference: 21-21 April 1999
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7695-0031-5
Print ISSN: 1522-8681
