Exit Recursion Models of Clustered Photolithography Tools for Fab Level Simulation

In semiconductor wafer fabricators (fabs), clustered photolithography tools (CPTs) are often the bottleneck. With a focus on fab-level simulation, we propose a new class of equipment models for CPTs called exit recursion models (ERMs). These models are inspired by concepts from flow line theory. We describe the intuition behind ERMs and provide the parameterization and simulation equations. These ERMs are data-driven empirical models and we develop three types based on different data perspectives: 1) tool log; 2) wafer log; and 3) lot log. To assess the quality of the proposed models, we conduct three classes of simulation experiments. A detailed CPT model, an affine model, and an empirical flow line model are used as the baselines. We consider mean cycle time, lot residency time, throughput time, and computation time as our primary performance metrics. The results suggest that ERMs are more accurate and robust than the affine models for all metrics and sometimes rival the performance of the empirical flow line models considered. ERMs require about 1.9 times as much computation as an affine model and about 250 times less computation than an empirical flow line model. ERMs may be helpful to increase the accuracy of fab-level simulation results without significant additional computation.