Charge-collection modeling for SER simulation in FinFETs

Soft-errors are one of the most important reliability issues in logic and memory circuits. Proper estimation of soft-error-rate (SER) is important for error mitigation and SER robust circuit design. This paper presents a physical charge collection model for accurate simulation/prediction of SER in FinFETs. The modeling is scalable and includes the effect of variation of FinFET process and layout parameters.