Reconfigurable side channel attack resistant true random number generator

Random Number Generators (RNGs) play an important role in cryptography. The security of cryptographic algorithms and protocols relies on the ability of RNGs to generate unpredictable secret keys and random numbers. This paper presents an implementation of Side Channel Attack resistant Galois Ring Oscillator (GARO) based True Random Number Generator (TRNG) on FPGA. To study and prove the robustness of the random number generator against placement sensitivity, due to various physical properties of logic elements and thermal variations of FPGA, the design (single instance of GARO) was implemented at four different quadrants in the FPGA and the generated random bit streams were analyzed. Such designs enable resilience against side channel attacks by injection locking. Further, to prove that the implemented TRNG is resilient against side channel attack (Electromagnetic Injection (EM) Attack, Frequency Injection Attack) the frequency spectrum of GARO was captured and analyzed. It was observed that the output of GARO is not dominated by any single frequency unlike non-GARO based ring oscillator which makes it difficult to get locked due to EM / Frequency injection at the specific oscillator frequency. The output bit-stream has been sampled from multiple spatially distributed TRNG units by round-robin. National Institute of Standards and technology (NIST) statistical test suite has been used to benchmark the statistical properties of generated random bit streams and bit streams fulfills all the test suite requirements.