Fully-digital time based ADC/TDC in 0.18μm CMOS

This paper proposes a fully digital sensor interface. For this, an analog to digital converter (ADC) and time to digital converter (TDC) based on a common time based ADC (TAD) architecture has been investigated. It is concluded that the proposed fully digital time-based ADC architecture can also be operated as TDC. The fully digital circuit has a ring delay line (RDL), latch, encoder and a synchronous counter. The circuit is implemented in 0.18μm digital CMOS, achieving 139μV/LSB (14-bit, 1-MS/s, 1.6 mW) in ADC mode and 227 ps/LSB (V_IN = 1.0 V, 14-bit), 94 ps/LSB (V_IN = 1.8 V, 14-bit) in TDC mode respectively. In addition to the scalable design, the resolution of both TDC as well as ADC, can be set by a variable input voltage, V_IN.