A 1.4 ns access 700 MHz 288 kb SRAM macro with expandable architecture

This 1.4 ns 700 MHz 4 kword/spl times/72 b embedded SRAM macro is intended for applications such as cache memory for system LSIs. The macro employs an easily expandable architecture. An 8 kword/spl times/72 b macro can be realized without loss of speed using two 4 kword/spl times/72 b macros.