Fabrication and RTN characteristics of gate-all-around poly-Si junctionless nanowire transistors

Short-channel gate-all-around (GAA) poly-Si junctionless (JL) nanowire (NW) transistors were fabricated using the control available through cost-effective I-Line lithographic patterning and spacer techniques. This scheme enables the production of GAA JL poly-Si NW transistors with channel length of as short as 120 nm and effective width of 49 nm, featuring significant improvement in subthreshold swing (SS) and transconductance (G
m
). The shrunken channel allows us to monitor clear random telegraph noise (RTN) signals under a sufficiently large gate overdrive condition.