An all digital BiCMOS phase lock loop for VLSI processors

A BiCMOS all digital phase lock loop is described. This design is suitable for applications such as clock recovery and frequency synthesis in VLSI processors where thermal stability is an important factor. The main block of the design consists of a digitally controlled oscillator with wide frequency range and high thermal stability compared to CMOS design. An improved BiCMOS adder/subtractor was also implemented to reduce worst-case propagation delay-time. A small test chip was fabricated using MOSIS Orbit 2 /spl mu/m low-cost analog CMOS process technology that provides lateral NPN bipolar device option.