Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers

A digital phase noise cancellation technique for ring oscillator-based I/Q receivers is presented. Ring oscillator phase noise, including supply-induced phase noise, is extracted from digital phase-locked loop (DPLL) and used to restore the randomly rotated baseband signal in digital domain. The receiver prototype fabricated in 65nm CMOS technology achieves phase noise reduction from −88 to −109dBc/Hz at 1MHz offset, and an integrated phase noise (IPN) reduction from −16.8 to −34.6dBc, when operating at 2.4GHz.