Random telegraph noise (RTN) in 14nm logic technology: High volume data extraction and analysis

With continued scaling of CMOS technology, numerous concerns have been raised about random telegraph noise (RTN) possibly matching or exceeding the random process variation in threshold voltage (V
_th
)[1], [2]. These studies are usually limited by the small sample size of the measurements, relying on modeling for projecting to high sigma. In this work, we use a modified ring oscillator (RO) circuit to measure the RTN in individual transistors (7500 NMOS and 7500 PMOS), for Intel's current 14nm technology. We analyze this data, carefully characterizing the noise signatures and accounting for the devices not showing RTN. We show that magnitude of V
_th
fluctuation due to RTN (ΔV
_th
^RTN
) at the ~3.7 sigma level is <; 25mV, and the ΔV
_th
^RTN
is uncorrelated to V
_th
random variation. From these observations, we conclude that RTN is not a significant limitation for circuit design at Intel's 14nm node.