Assessing techniques to compare signal integrity data for high speed interconnects

The IEEE is currently developing a standard “Electrical characterization of printed circuit board and related interconnects at frequencies up to 50GHz” (IEEE Std P370). As part of the development of this standard, a technique (or techniques) is (are) required in order to provide a measure of the goodness-of-fit between measured and simulated data for a structure or between different measurements or simulations. Such a technique needs to be both robust and sensitive, in that it should be robust enough to be applicable to the full variety of data that can arise from such systems but sensitive enough to provide subtle feedback to the engineer performing the comparisons to enable decisions to be taken about the acceptability of the data. This paper assesses some statistical and heuristic candidate tests with the aim of proposing a strategy for the standard development working group.