Silicon neuron-analog CMOS VLSI implementation and analysis at 180nm

Carver Mead at Caltech in the mid-1980s proposed to build devices based on the organizing principles used by nervous system. He coined these systems as ‘Neuromorphic systems’. They are usually composed of analog electronic circuits in the Complementary-metal-oxide-semiconductor (CMOS) technology. These Neuromorphic circuits aim at emulating biological nervous system and its components in silicon hardware. The emulation of neuron behavior at circuit level is one of the most complex tasks in the development of neuromorphic hardware. The analog implementations of neurons require less area and less power consumption as compared to its digital implementation. Thus, these are the serious contenders for future large scale neuromorphic systems. A number of neuron models and their implementations are reported in literature out of which Integrate and fire neurons are found to be most simple, compact, and highly energy efficient circuits. In quest of implementation of more dense and low power circuits in these analog electronic systems, constant scaling of CMOS technology has opened new avenues. In order to get benefit from the scaled down technology node and the Silicon neuron circuits already available, the option of porting an existing neuron circuit implemented in higher process technology to the 180nm process technology is explored in this paper. We have implemented an existing integrate and fire neuron circuit at 180nm CMOS technology node with circuit simulator and studied the resulting characteristics.