Latency aware decoder for high-order modulations MIMO transmissions with parallel processing architectures

High order modulations with multi-stream transmissions have been proposed recently as a promising feature to increase the available data rates in the upcoming releases of LTE systems. Increasing the modulation order requires additional processing capabilities in both infrastructure nodes and mobile terminals. However, most of decoding algorithms are based either on turbo processing strategies or successive interference cancellation schemes. For mobile terminals, such strategies introduce significant decoding latency and are not compatible with parallel computing architectures that are implemented in modern devices. This paper proposes a tunable complexity scheme for multi-stream transmissions with high modulation orders (64QAM and higher). The scheme is based on lattice reduction followed by a list based maximum likelihood detection. The proposed strategy allows the same performance as successive interference cancellation schemes and offers a better decoding latency with parallel processing architectures.