Architecture-independent negative logic implementation for optically reconfigurable gate arrays

Optically reconfigurable gate arrays (ORGAs) comprise a holographic memory, a laser array, and an optically reconfigurable gate array VLSI. According to holographic memory properties, the reconfiguration speed and radiation tolerance of ORGAs depend on the number of bright bits included in a configuration context. This paper therefore proposes a method of reducing the number of bright bits included in a configuration context using negative logic implementation. Since the method is architecture-independent, the method offers the important benefit that it is never necessary to modify the architecture of optically reconfigurable gate array VLSIs. This paper describes experimental demonstrations of the reconfiguration speed and radiation-tolerance advantages of the method.