Advances of chip-scale atomic clock in Peking University in 2015

In this paper we present our advance of chip-scale atomic clock (CSAC) based on the
⁸⁷
Rb coherent population trap (CPT) transition. Compare with last year, we made great progress in frequency instabilities and power consumption. The overall size of the clock is 20 cm
³
volume and the total power consumption of the whole system is less than 350mW. Especially the frequency stability (Allan deviation) of the 10 MHz output signal reaches 6×10
^-12
at average time of 1000 s.