Design & analysis of novel comparator without biasing for high performance application

Comparator have important role in ADC as which generates valid signal to the clock generator as well as compares the DAC output. Speed and the resolution is determined by the comparator, so, it is most important part in the SAR ADC. Comparator act as input signal to the clock generator as well as the compares DAC output in SAR ADC. In this paper, the analysis of the different dynamic comparator and propose a better structure, which can run faster and provide more stable output signal than the traditional structures. Comparator is designed in 180nm CMOS technology and analyzed using Node analysis.