Linear Doherty power amplifier with adaptive bias circuit for average power-tracking

This paper presents a linear Doherty power amplifier (PA) with adaptive bias circuit for average power-tracking (APT) operation. The Doherty PA is linked with a multi-level DC-DC converter for APT in all amplifiers including the carrier-, peaking-, and drive-amplifiers. The Doherty PA delivers high efficiencies at all average output power levels. Also, the high linearity is maintained with various collector biases by the adaptive bias circuits. For demonstration purposes, the PA with adaptive bias circuits is implemented using an InGaP/GaAs heterojunction bipolar transistor (HBT) and Texas Instruments' LM3290 product is used for the multi-level DC-DC converter. The PA is tested at 1.9 GHz using a fully loaded long-term evolution (LTE) signal with 16-quadrature amplitude modulation (QAM), 7.5-dB peak-to-average power ratio (PAPR), and 10-MHz bandwidth. The PA delivers a power-added efficiency (PAE) of 45.7%, an error vector magnitude (EVM) of 2.65%, and an access adjacent channel leakage ratio (E - UTRAACLR) of -35.3 dBc at an average output power of 27.5 dBm, and the efficiency of whole back off regions are significantly improved.