A novel low-power readout structure with 1/2 sub-scan time-delay-integration and DLL-based A/D for 1024×6 infrared focal plane array

This paper presents a new low-power readout structure for 1024×6 infrared focal plane array with 1/2 sub-scan time-delay-integration (TDI) and delay-locked-loop-based (DLL-based) analog-to-digital (A/D) function. The circuit is of low power for its passive sampling, delay, and summation completed by capacitor array. Multiple-capacitor structure is also used to make the circuit suffer less from capacitor mismatch. 1/2 sub-scan function and the distribution of detector array contribute to higher resolution in the direction both along the track and across the track. And the TDI function is combined with A/D process in terms of circuit structure and timing sequence, reducing the noise and enhancing the frame rate. The 14-bit ADC is divided into coarse quantization part and fine quantization part. The former is a conventional 11-bit single-ramp ADC and the latter is realized by 8-phase clocks generated by DLL. This circuit also supports bidirectional scanning and two types of detectors whose photo-current flows into or out of the readout circuit.