A multi-mode 30 GHz 2 degree RMS power efficient phase-locked loop frequency synthesizer

This paper presents a multi-mode power efficient PLL synthesizer with low power consumption and low phase noise using coupled-tank voltage controlled oscillator and local oscillator chain for 60 GHz transceiver supporting IEEE 802.11 ad standards. Fabricated in commercial 0.18 μm SiGe BiCMOS process with a single 1.8 V supply, the PLL synthesizer covers frequency from 29.5 GHz to 33.5 GHz with a RMS noise of 2 degrees integrated over phase noise from 10 kHz to 10 MHz. The fully integrated PLL synthesizer consumes low power of only 63 mW and occupies an area of 1.1 mm × 1.6 mm excluding the loop filter.