Stress Development During High Dielectric Ceramic Thin Films Processing

High dielectric ceramic thin films incorporated into microelectronic packaging will extend both the performance and functions of advanced microelectronic packaging. The low processing temperatures, excellent composition control and low capital manufacturing costs may make the sol-gel film preparation route a prime manufacturing method. For this technique to be a useful alternative to competing vacuum deposition methods, the interactions between the commonly employed packaging materials set and the Sol gel derived films must be understood. To integrate these films into applications the development of thin film stresses and resulting defects must be understood. In this study, we are examining the processing of sol-gel derived barium titanate thin films for use as integrated decoupling capacitors as our model system. Stress measurements are made by measuring curvature of thin film coated wafers as a function of temperature and time. The films exhibit both plastic and elastic behavior at different processing stages. These films are microscopically examined to observe the formation of microstructure including cracking and pinholes. By tailoring the thermal process to the viscoelastic film behavior high quality films may be produced.