Analysis of energy efficient double tail regenerative comparators

Comparator is one of the basic building blocks in many analog to digital converters (ADC), it is the decision making circuit that compares two analog (voltage) inputs to give a single digital output. For high speed ADC's, Comparators are designed in such a way that it provides fast decision output, has reduced delay and low power consumption. The conventional double tail regenerative comparators are designed without stacking too many transistors which provides a fast decision output due to the positive feedback in the regenerative latch. The conventional double tail regenerative comparator is modified using control transistors and nmos switches. Power and delay of the modified comparators are analyzed for its application in high speed ADCs.