Design of a Real Coded GA processor

Real Coded Genetic Algorithm (RCGA) has been attracting attention as one of the GA for handling real-valued vectors. Various GA hardware have been proposed, for evolvable hardware, and for an increase in computational throughput. Yet, there are few reports of RCGA hardware. Herein, we propose a design for a real coded GA processor. The proposed processor is implemented using the JGG (Just Generation Gap) as a generation alternation model and the REX (Real coded Ensemble Crossover) as a crossover. In addition, the evaluation functions that depend on problem are calculated using soft macro CPU. The proposed processor is to be applied expected in embedded field applications because of it can be implemented in one chip FPGA.