Experimental demonstration of SiC screen grid vertical JFET (SiC-SGVJFET) having a ultra-low Crss

We have implemented a novel SiC power JFET having a ultra-low feedback capacitance Crss and the voltage rating of 1200V, which is called the screen grid vertical JFET (SGVJFET). Capacitance-voltage tests have made it clear that the introduction of the screen grid drastically reduces the Crss. Impacts of the spacing between the adjacent screen grids on the static and switching characteristics have been investigated.