A simplified SVPWM strategy for universal single-phase multilevel converter

In order to reduce the computational complexity of conventional single-phase multilevel space vector pulsewidth modulation (SVPWM) strategy and resource consumption of micro controller chip, a simplified SVPWM strategy adopted for single-phase 5-L/7-L converter is proposed. The proposed strategy simplifies the calculation of single-phase 5-L/7-L SVPWM to single-phase 3-L SVPWM by dividing the voltage vector space of single-phase 5-L/7-L SVPWM into different single-phase 3-L SVPWM voltage vector space and decomposing the reference voltage vector into different voltage vectors. This paper realizes the proposed single-phase 5-L/7-L SVPWM and conventional single-phase 5-L/7-L SVPWM for neutral point clamped (NPC) converter and cascaded H-bridge (CHB) converter on a single field programmable gate array (FPGA). Experimental results are given to verify correctness and feasibility of the proposed strategy.