Toward successful integration of gap-filling ultralow-k dielectrics

The replacement of a sacrificial template by gap-filling ultralow-k dielectric is studied as an alternative integration approach for Cu/low-k interconnects. The low-k curing processes induce severe damage to metallization structures, leading to detrimental electrical performance. Cu lines are passivated by a PECVD SiCN layer. Optimal yield can be restored, and promising electrical performance is demonstrated. Film shrinkage leads to low-k delamination in the trenches. By using multiple spin coating followed by soft bake, void free gap-filling structure is achieved.