Simulation-based analysis on EMI effect in LPDDR interface for mitigating RFI in a mobile environment

An increase in electromagnetic interference (EMI) noise in mobile application directly affects the performance of the other chips or antenna that can lead to the degradation of total isotropic sensitivity (TIS) and system reliability. According to our near fiend scanning (NFS) results, electromagnetic (EM) noise emitted from AP-LPDDR memory interface in a package on package (POP) structure was found to be one of the major factors. When noise frequency is placed on the communication channel, the relevant clock frequency needs to be adjusted to avoid the radio frequency interference (RFI). In this work, we report the simulation-based analysis and modeling to estimate the EMI noise magnitude and its bandwidth of an AP-LPDDR interface prior to silicon characterization. This helps address the potential EMI risks and help select RFI-aware frequency on ICs upfront at the pre-silicon level. Our simulation results were in good agreement with silicon results validating our modeling approach. In order to analyze the EMI effect from AP-LPDDR interface, the IO clock and data signals were modeled with the controllable parameters. By analyzing voltage fluctuations at the memory pad the noise frequency at peak points and their bandwidths were estimated, and by adjusting critical factors such as bits toggle/idle ratio, and burst length, the influence of EMI magnitude and bandwidth have been identified. The approach was validated with measured voltage at the interposer.