Functional block identification in circuit design recovery

Design recovery is commonly conducted across many different platforms to gain knowledge about the underlying internals of a system. In this paper, a concept of segmentation and fuzzy matching is introduced to identify IP blocks within a design. Through this process, known IP blocks, especially in optimized ASIC and FPGA designs, can be identified within a netlist. Furthermore, these algorithms are computationally more efficient in comparison to the traditional subgraph isomorphism problem.