Improvement of Poly-Si Channel Vertical Charge Trapping NAND Devices Characteristics by High Pressure D2/H2 Annealing

In this paper, we investigate the effect of High Pressure Hydrogen or Deuterium Annealing on a vertical charge trapping NAND memory device. Strong improvement is obtained in Vt, subthreshold slope and drive current of the transistors by a better passivation of charge by either species in the bulk ONO memory stack, at the interface between ONO and Poly-Si channel, and in the bulk Poly-Si. Program / Erase and Retention remain identical, and no benefits could be observed by using D2 instead of H2 as passivating species in terms of robustness towards program/erase cycling damages.