Bit error rate measurements of a 4 × 4 Si-Photonic switch using synchronous and asynchronous data

The bit error rate (BER) of a 4 × 4 Si-Photonics switch chip is characterized using four independent 10-Gb/s datastreams that are clock-synchronous or clock-asynchronous in a FPGA-based system test bed. Clear effects on the BER were seen as a result of on-chip crosstalk.