Test coverage debugging for designs with timing exception paths

Timing exception paths (e.g. false and multicycle paths) are commonly seen during scan test today and must be handled properly to obtain high test coverage while avoiding simulation mismatches. This paper proposes a systematic approach to analyze and debug the low test coverage issue due to timing exception paths. Experimental result demonstrates that by using the proposal method, the target test coverage can be achieved by excluding very few timing exception paths. This analysis is useful to derive an actionable step to optimize the design to meet the test quality goal.