Asymptotic performance analysis for 1-bit Bayesian smoothing

Energy-efficient signal processing systems require estimation methods operating on data collected with low-complexity devices. Using analog-to-digital converters (ADC) with 1-bit amplitude resolution has been identified as a possible option in order to obtain low power consumption. The 1-bit performance loss, in comparison to an ideal receiver with ∞-bit ADC, is well-established and moderate for low SNR applications (2/π or -1.96 dB). Recently it has been shown that for parameter estimation with state-space models the 1-bit performance loss with Bayesian filtering can be significantly smaller (√2/π or -0.98 dB). Here we extend the analysis to Bayesian smoothing where additional measurements are used to reconstruct the current state of the system parameter. Our results show that a 1-bit receiver performing smoothing is able to outperform an ideal ∞-bit system carrying out filtering by the cost of an additional processing delay Δ.