Enhancing electrical performances of metallic DG-SET based circuits by tunnel junction engineering

The development of metallic Single Electron Transistor (SET) is extremely related to the downscaling and the electrical properties of its tunnel junctions. These tunnel junctions should insure high ON current, low OFF current and low capacitance. In this work, we propose an engineered tunnel junction based on multi-dielectric stacking to optimize the tunnel junction's characteristics. The optimized tunnel junction is demonstrated to increase ION current and the ION/IOFF ratio in Double-Gate SET (DG-SET). DG-SET based elementary circuits are demonstrating enhanced electrical characteristics.