A Digital Testing Strategy for Characterizing an Analog Circuit Block

This paper presents a digital testing strategy for characterizing an analog circuit block. The operational amplifier (op amp) is evaluated due to its wide application in electronic circuits and systems. In the proposed strategy, the op amp device under test (DUT) is configured to respond to a testing pulse, and the associated output is digitized by a digital buffer to reduce the high cost of generating a high-frequency clock. The testing procedure is divided into two modes to estimate the reference slew rate and then to evaluate the practical slew rate to moderate the difficulty of designing a digital buffer that has a highly precise delay time. The testing concept, accuracy, time, and hardware are also comprehensively investigated to describe the proposed testing strategy. The digital compatibility, the simplicity, and the testing capability of the high-performance op amp are the main advantages of the proposed testing strategy. Easily available discrete devices were experimentally employed to verify the functionality of the proposed testing strategy. An integrated application to test the op amp DUT embedded in a second-order Sallen-Key low-pass filter was simulated with the HSPICE tool to verify the testing feasibility and the effectiveness of the proposed strategy.