The nanodamascene process: A versatile fabrication technique for nanoelectronic applications

In this paper we present a versatile nanodamascene fabrication process for the realization of low power nanoelectronic devices. This process has been exploited for the fabrication of metal/insulator/metal junctions, metallic single electron transistors, silicon tunnel field effect transistors, and planar nanometric resistive memories. Due to its low thermal budget, and materials, this technology is fully compatible with CMOS back-end-of-line and is used for monolithic 3D integration.