Performance analysis and improvement of nanoscale double gate Junctionless transistor based inverter using high-K gate dielectrics

In this paper an inverter based on three dimensional (3D) double-gate Junctionless Nanowire Transistor (JNT) of 20nm gate length is proposed. Extensive mixed mode simulation is performed for the inverter circuit to investigate several inverter characteristics such as voltage transfer characteristics, switching characteristics, inverter gain, Noise Margin. For the betterment of these features, inverter circuits of junctionless transistors with higher gate oxide are investigated. It is observed that inverter with the high-K material (HfO
₂
) as gate dielectric shows improvement in inverter characteristics with respect to SiO
₂
and Si
₃
N
₄
. Thus by choosing the proper gate material performance improvement of a junctionless inverter can be achieved in order to make it a promising candidate for future CMOS Technology.