Hardware implementation of OFDM transceiver using FPGA

Latest developments in the field of wireless communication systems require a technology which should be accurate, reliable and adopt high data rate transmission across the systems. Orthogonal frequency division multiplexing (OFDM) technique will provide good resistance to multi path interference and inter symbol interference (ISI) caused by broadband multi carrier (MC) high data rate wireless systems Conventional OFDM transceiver system is formed by considering the orthogonality among the subcarriers achieved by the use of orthogonal discrete Fourier transform (DFT). The DFT can be implemented using computational efficient fast Fourier transform (FFT) algorithms. A new orthogonal transform developed by Hirschman, Hirschman optimal transform (HOT), the basis function of HOT is derived from DFT and it can be efficiently implemented using the same FFT algorithms. A computationally efficient HOT based OFDM was developed by the authors and reconfigurable hardware prototyping of the same was considered here for practical implementation using FPGA. Even though, similar bit error rate (BER) was reported in simulations for both DFT and HOT, the HOT is computationally attractive. FPGA implementation reveals the efficacy of the proposed HOT based OFDM transceiver in terms the computational complexity.